Hello There, Guest! RegisterLogin with Facebook
Login with Facebook

>>> Anna University Sixth Semester Question Bank Collection (R2013) ECE,MECH,CSE,IT,EEE,CIVIL,EIE
>>> Anna University Study Materials for all Departments
>>> Anna University Question Papers : April May June 2015 Question Papers | Nov Dec 2014 and Jan 2015 Question Papers

Register or Login to Submit Study Materials , Shoutbox and also to access Many Features !!

Vidyarthiplus Shop :: Handwritten Premium Lecture Notes
Share your Study Materials with us
Share your Study Materials with us : Click Here

AU R2004 EC1312 Digital Logic Circuits Nov Dec 2013 Question Paper

Question Paper Code 88887 
Fifth Semester
Electrical and Electronics Engineering
(Common to Fourth Semester - Instrumentation and Control Engineering and Electronics and Instrumentation Engineering) 
(Regulation 2004) 
(Common to B.E. (Part Time) Fourth Semester - Electrical and Electronics Engineering - Regulation 2005) 
Time : Three hours 
Maximum : 100 marks 

Answer ALL questions. 
PART A — (10 x 2 20 marks) 
1.Convert (9B2)16 to binary and decimal. 
2.Write down the truth table for the binary expression X + XY. 
3.Give two applications of XOR gate. 
4.Draw a 4 to 1 multiplexer. 
5.What is 'race a.round' 
6.Write down the truth table of JK flipflop. 
7.What is an asynchronous sequential circuit? 
8.What is a hazard? 
9.Draw a ROM cell. 
10.Define noise margin. 

Full Name :Arumugam.P
College Name :SNS College Of Technology
Department :EEE
Semester :05
Subject Code :EC1312
Subject Name : Digital Logic Circuits
Study Material Description :QP

Attachment :

.pdf   DLC ND2013 QP.pdf (Size: 1.26 MB / Downloads: 91)

aaru, proud to be a member of Vidyarthiplus.com (V+) - Online Students Community since Jan 2013.



Recommend on Google