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EE2255 Digital Logic Circuits Nov Dec 2014 Question Paper - Original Version

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  • EE2255 Digital Logic Circuits Nov Dec 2014 Question Paper - Original Version
• EE2255 Digital Logic Circuits Nov Dec 2014 Question Paper - Original Version

• EE2255 Digital Logic Circuits Nov Dec 2014 Question Paper - Original Version

  aaru > 15-11-2014, 06:21 PM

     

  Question Paper Code: 91442

  B.E. / BTech. DEGREE EXAMINATION, NOVEMBER / DECEMBER 2014

  Fourth Semester

  Electrical and Electronics Engineering

  EE 2255 / EE 46 / EC 1261 A / 08028Q029/10133 EE406 A - DIGITAL LOGIC CIRCUITS

  (Regulation, 2008/2010)

  (Common to PTEE 22551 101-33EE 406 - Digital Logic Circuits for B.E (Part-Time) Second !Third Semester - EEE  : Regulation 2009/2010)

  Time: Three hours
  Maximum: 100 marks
  Answer ALL questions.
  1.. Draw the logic-diagram of an half adder.
  2. What are the applications of multiplexer?
  3. Implement T flip flop using JK flipflop.
  4. Define state.
  5. What are the disadvantages of asynchronous sequential circuit?
  6, Define racing.
  7. How to program and erase the-contents of EPROM?
  8. What is advantages of EeL over TTL?
  9. List out the operators used in vHDL.
  10. What is a test bench? 
  
  Full Name :Arumugam.P
  College Name :SNS COLLEGE OF TECHNOLOGY
  Department :EEE
  Semester :04
  Subject Code :EE2255
  Subject Name IGITAL LOGIC CIRCUITS
  Study Material Description :QP
  
  Attachment : 
    EE2255 DLC Nov Dec 2014 QP V+.pdf (Size: 161.93 KB / Downloads: 1,289)

• RE: EE2255 Digital Logic Circuits Nov Dec 2014 Question Paper - Original Version

  Srini > 15-11-2014, 10:36 PM

  +3
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