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EI2253 Digital Logic Circuits Nov Dec 2014 Question Paper - Original Version

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  • EI2253 Digital Logic Circuits Nov Dec 2014 Question Paper - Original Version
• EI2253 Digital Logic Circuits Nov Dec 2014 Question Paper - Original Version

• EI2253 Digital Logic Circuits Nov Dec 2014 Question Paper - Original Version

  aaru > 10-11-2014, 12:48 PM

     
  

  Question Paper Code : 91467

  B.E. / B.Tech. DEGREE EXAMINATION, NOVEMBER / DECEMBER 2014.
  

  Fourth Semester

  Electronics and Instrumentation Engineering
  

  EI 2253 / EI 43/080300014 / 10133 EE 406 - DIGITAL LOGIC CIRCUITS
  

  (Regulation 2008 / 2010)

  
  Time: Three hours
  Maximum: 100 marks
  
  Answer ALL questions:
  PART A (10 x 2 = 20 marks) .
  1. State Consensus theorem.
  2. Simplify the function -rF (A, B, C) - L (0, 1, 3, 5,.7).
  3. Implement the following function using suitable multiplexer.
  F(A,B) = Lm(O, 1, 2).
  4. Implementa Halfsubtractor ti.~ing~a suitable decoder and an OR gate.
  5. What isarace around, condition? How it is avoided?
  6. Convert T flip flop into aD flip flop.
  7 .Compare Synchronous andAsynchronous sequential circuits.
  8. State the rules for state assignment
  9. State the difference between PLA and PAL
  10. What is a totem pole output?
  
  (For Part B Questions, Attachment the Attachments)
  
  Full Name :Arumugam.P
  College Name :SNS COLLEGE OF TECHNOLOGY
  Department :EIE
  Semester :04
  Subject Code :EI2253
  Subject Name : Digital Logic Circuits
  Study Material Description :QP
  
  Attachment : 
    EI2253 DLC Nov Dec 2014 QP.pdf (Size: 137.69 KB / Downloads: 1,376)

• RE: EI2253 Digital Logic Circuits Nov Dec 2014 Question Paper - Original Version

  Srini > 10-11-2014, 05:45 PM

  +3
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